On-Chip is an emerging communication paradigm for large VLSI systems implemented on a single silicon chip. This uses as a new approach to design complex System-on-a-chip (SoCs). The NoC-based systems can accommodate multiple complex (heterogeneous) SoC designs. In any on-Chip communications system, cores such as processor, memories, and customized IP blocks exchange data using a computer network protocol and physical infrastructure of on-chip networks. This special session addresses all aspects related to concepts, implementations and applications of on-chip communications as well as related EDA tools and on-Chip communication simulators. Nonetheless, its focus is on advanced issues and interdisciplinary topics like system control, design flow, application studies and the outlook on future developments in on-chip communications design.
Papers on any of the following and related topics will be considered for the special session:
SUBJECT COVERAGE
Emerging topology and router architecture for on-Chip communications
Routing algorithm and micro architecture
Switching and Control flow techniques
QoS Parameters in on-Chip communications
Memory Architecture for NoC
Power and Energy issues
On-Chip communication simulators
Clockless architectures and asynchronous communication techniques
Reliability issues in on-Chip communications
Emerging technologies for on-Chip communications (Optics, Nanowires etc)
On-Chip communication case studies
Organizers
MOHAMMAD AYOUB KHAN,
Centre for Development of Advanced Computing(C-DAC)
Ministry of Communications and IT, Government of India
B-30, Sector 62, NOIDA, INDIA
ayoub@ieee.org.
Abdul Quaiyum Ansari,
Department of Electrical Engineering
Jamia Millia Islamia (A central Government University)
New Delhi-25, INDIA
aqansari@ieee.org .
Ashraf Darwish,
3Computer Science Department, Faculty of Science, Helwan University, EgyptMachine Intelligence
Research Labs (MIR Labs), USA
Editor-in-Chief, International Journal of Sensor Networks and Data Communications
http://www.ashdin.com/journals/ijsndc/ijsndc.aspx.
Ajith Abraham,
Machine Intelligence Research Labs (MIR Labs), EU.